Field of the Invention
The present invention generally relates to electronic systems, and more particularly to electronic systems with interconnects.
Background
A through-silicon via (TSV), also known as a through-substrate via, is an interconnect structure formed in a substrate that provides a vertical electrical connection passing completely through the substrate.
There are multiple ways to categorize a TSV architecture. One categorization is based on when TSV fabrication process is performed in relation to a CMOS or a MEMS device fabrication process. For example, in a TSV-first architecture, TSVs are completely formed in a substrate prior to forming CMOS or MEMS devices in the same substrate. In a TSV-middle architecture, TSVs are partially formed first and then completed after forming, or partially forming, CMOS or MEMS devices.
Another categorization is based on the conducting material that is used for the through-substrate conduction. In an example, holes are etched in a substrate and lined with a dielectric. The hole is filled with a conducting material, such as copper. In subsequent fabrication steps, electrical contacts are made to the top and bottom of the filled conducting TSV plug. In another example, a continuous trench is etched partially through the substrate in a closed pattern, such as an annulus. The trench is then partially filled with a dielectric material. Electrical connection is made to the surrounded silicon using a metal trace and a via opening. In subsequent fabrication steps, the substrate is flipped over; an electrical connection, such as a bond pad or solder bump, is made; and, a second trench that intersects with the continuous trench is etched, thereby removing the only remaining electrical connection between the surrounding substrate and the silicon plug inside the closed contour filled with a dielectric material. A similar process is described in U.S. Pat. No. 6,815,827.
In an alternative process, the silicon plug is doped to create a resistivity within the plug that is lower than that of the surrounding substrate. A similar process is described in U.S. Pat. Nos. 7,227,213 and 6,838,362.
TSV is commonly used for 3D/2.5D integration of integrated circuits because of its ability to electrically couple two or more substrates that are stacked on top of each other and because of its superior performance compared to conventional interconnects. However, despite these benefits, it is not widely used in the field because it is currently too expensive to fabricate. Therefore, there is a need for a new TSV structure that has a lower fabrication cost than a conventional TSV structure.